Excavating
Patent
1993-06-01
1995-07-25
Harvey, Jack B.
Excavating
371 214, 36518907, G06F 1100
Patent
active
054369134
ABSTRACT:
A non-volatile semiconductor memory device has writing part (203, 205, 209) for writing data in a non-volatile memory cell in response to a write pulse, readout part (419) for reading out data stored in the memory cell, and verification part (207, 210; 417) for verifying to ensure that normal writing has been completed by reading data from the memory cell after each writing. The device repeats writings unless a normal writing can be confirmed by the verification part. At this time, the writing part can vary writing time and in a part of a sequence of repeating writing unless a normal writing can be confirmed, it sets writing time longer for the next writing action than that for one writing action. Since this setting is performed according to constant multiplication, constant increment, or constant multiplication of accumulated value, necessary time for obtaining normal data write can be reduced.
REFERENCES:
patent: 4460982 (1984-07-01), Gee et al.
patent: 4963825 (1990-10-01), Mielke
patent: 5034922 (1991-07-01), Burgess
patent: 5161161 (1992-11-01), Malek-Khoscavi et al.
1991 IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991. Masaki Momodomi, et al., "A 4-Mb NAND EEPROM with Tight Programmed VHd t Distribution", pp. 492-445.
Asano Masamichi
Kato Hideo
Nakai Hiroto
Tokushige Kaoru
Yamamura Toshio
Harvey Jack B.
Kabushiki Kaisha Toshiba
Seto Jeffrey K.
LandOfFree
Non-volatile semiconductor memory device using successively long does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile semiconductor memory device using successively long, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device using successively long will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-745586