Error correction system for random access memory

Details Error correction system for random access memory Error correction system for random access memory

1974-12-24

1977-06-21

Dildine, Jr., R. Stephen

Registers

Transfer mechanism

Traveling pawl

250336, 235153AE, 235153BN, 307308, 3401461AG, 340173BB, 340174ED, G11C 2900, G06F 1110

Patent

active

040313743

ABSTRACT:
An error correction system is provided for a random access memory system of the magnetic core or plated wire type, and which serves to render the memory system immune to the effects of nuclear radiation, and the like. The system of the invention includes circumvent circuitry which serves to limit all currents in the memory access network to safe values during a radiation event, so as to pevent burn-out of the memory and of its associated components. The system of the invention also serves to correct single word errors which can occur to words being written or read during the radiation pulse. The single word error correction is achieved in a first embodiment of the invention by partitioning the fixed data program words in the memory into blocks; by providing an error correction word for each such block, and by reconstructing from the error correction word, the word being read or written during the radiation pulse. This is achieved in the first embodiment of the error correction system by first accessing the affected word, then loading all zeros into the memory address of the affected word, and then reconstructing the effected word by the provision of an "exclusive or" summing means which forms a computed error correction word for the entire block, including the affected word (which is now zeros), plus the original error correction word. The computed error correction word is a reconstruction of the affected data word. A second embodiment of the invention achieves the same correction in the case of the variable data storage portion of the memory, by means of a system which continuously up-dates the error correction word as the variable data in the memory is up-dated. Further embodiments of the invention provide error correction to the variable data words without the use of error correction words.

REFERENCES:
patent: 3409839 (1968-11-01), Crowe
patent: 3524999 (1970-08-01), Fletcher et al.
patent: 3533082 (1970-10-01), Schnabel et al.
patent: 3623014 (1971-11-01), Doelz et al.
patent: 3652877 (1972-03-01), Smith
patent: 3659275 (1972-04-01), Marshall
patent: 3668644 (1972-06-01), Looschen
patent: 3755791 (1973-08-01), Arzubi
patent: 3771143 (1973-11-01), Taylor
patent: 3838261 (1974-09-01), Rice et al.
patent: 3876978 (1975-04-01), Bossen et al.

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