High-speed delay verification apparatus and method therefor

Details High-speed delay verification apparatus and method therefor High-speed delay verification apparatus and method therefor

1996-12-20

2000-03-21

Teska, Kevin J.

G06F 1750

Patent

active

060411686

ABSTRACT:
A high-speed delay verification apparatus and method includes a tracing device for respectively tracing a circuit in input (fan-in) and output (fan-out) directions thereof, based on the circuit information stored in a delay model storage device. The tracing device obtains the maximum value of the delay time of each node. The tracing device further sums the maximum values of the delay times obtained, and adds the sum of the maximum value of the delay time obtained for each node to circuit information of the delay model storage device to store it into an additional model storing device. A limit inspecting device deletes, based on the information stored in the additional model storing device, the node and its arc in which the sum of the maximum value of the delay time is less than the limit value of the delay time of the limit value storing device from the information stored in the additional model storing device and then stores such node and arc information in a modified model storage device. The limit inspecting device may also delete, based on the information stored in the additional model storing device, the node and its arc in which the sum of the minimum value of the delay time is greater than a second limit value and then store such node and arc information in the modified model storage device. A delay verification device verifies the delay based on the circuit information of a modified model storing device. Thus, the delay verification can be performed at high-speed.

REFERENCES:
patent: 5258919 (1993-11-01), Yamanouchi
patent: 5508937 (1996-04-01), Abato et al.
patent: 5535145 (1996-07-01), Hathaway
patent: 5617325 (1997-04-01), Schaefer

Affiliated with

Also associated with

Rating

High-speed delay verification apparatus and method therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-speed delay verification apparatus and method therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed delay verification apparatus and method therefor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-736868