Solder bumping of integrated circuit die

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

Patent

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Details

4273746, 4273767, 22818022, 29840, 29843, C23C 2600

Patent

active

052816842

ABSTRACT:
A method for forming a solder bump on an integrated circuit die utilizes a terminal (12) formed of an electrically conductive, solder-wettable composite material composed of copper particles and a polymeric binder. The terminal comprises a bond pad (24) overlying a passivation layer (20) on the die and a runner section (26) connecting the bond pad to a metal contact (16). The terminal is applied to the die, for example, as an ink by screen printing, after which a body of solder alloy is reflowed in contact with the bond pad to form the bump. A preferred material for the terminal is composed of silver-plated copper particles and a resol type phenolic binder.

REFERENCES:
patent: 3458925 (1969-08-01), Napier
patent: 4273859 (1981-06-01), Mones
patent: 4450188 (1984-05-01), Kawasumi
patent: 4661192 (1987-04-01), McShane
patent: 4661375 (1987-04-01), Thomas
patent: 4729165 (1988-03-01), Fahrenschon
patent: 5048747 (1991-09-01), Clark
patent: 5092034 (1992-03-01), Altendorf
patent: 5135155 (1992-08-01), Kang

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