Parallel testing of CPU cache and instruction units

Details Parallel testing of CPU cache and instruction units Parallel testing of CPU cache and instruction units

1995-06-16

1996-07-23

Nguyen, Hoa

Excavating

39518318, 371 211, 371 221, G06F 1100, G06F 1130

Patent

active

055398782

ABSTRACT:
A method for testing CPU microprocessors having internal cache involves testing one IU and a portion of the internal cache, then loading a cache test routine to the tested portion of internal cache and causing that routine to be executed by the tested IU to test the previously untested portion of the internal cache while simultaneously testing any other IUs and circuitry on the CPU microprocessor. A system is disclosed for performing the method.

REFERENCES:
patent: 4553201 (1985-11-01), Pollack, Jr.
patent: 4891811 (1990-01-01), Ash et al.
patent: 5155844 (1992-10-01), Cheng et al.
patent: 5398325 (1995-03-01), Chang et al.
patent: 5479413 (1995-12-01), Sicola et al.

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