Fishing – trapping – and vermin destroying
Patent
1995-01-19
1996-07-23
Thomas, Tom
Fishing, trapping, and vermin destroying
437 44, H01L 21265
Patent
active
055389090
ABSTRACT:
The present invention provides a novel MOS transistor structure and method of fabrication. To make this device, a gate electrode is formed on a silicon substrate first and a pair of shallow trenches with a depth of between 200.ANG. to 500.ANG. are formed apart on portions of the silicon substrate adjacent to the gate electrode. Next, lightly doped source/drain regions that extends to areas under the gate electrode are formed on the silicon substrate by using the large-angle-tilt implanted drain technique. The highest electric field of the lightly doped source/drain regions can be shifted into areas under the gate oxide layer at a depth of between 200.ANG. to 500.ANG.. Therefore, the probability of hot electron injection into the gate oxide layer is reduced and the device reliability is improved. In addition, the gate to drain capacitance is reduced, leading to an increase in device speed.
REFERENCES:
patent: 5262337 (1993-11-01), Kim
patent: 5382534 (1995-01-01), Sheu et al.
patent: 5403763 (1995-04-01), Yamazaki
Gurley Lynne A.
Thomas Tom
United Microelectronics Corporation
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