Method and apparatus for bus arbitration in a data processing sy

Details Method and apparatus for bus arbitration in a data processing sy Method and apparatus for bus arbitration in a data processing sy

1985-10-22

1987-05-26

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

3408255, H04J 302

Patent

active

046690794

ABSTRACT:
In a bus-oriented computer system, the decision as to which unit is to receive the bus takes account of the current status of the bus system and the respective operation to be performed on the bus. For that purpose, status information of the connected units, the bus command to be executed and the address of the requested unit are fed to the allocation logic (arbiter) on separate or commonly used lines, thus avoiding idle times during the use of the bus. By evaluating the bus command, the allocation priority can be dynamically changes in order to suppress bus accesses that are bound to fail from the start.

REFERENCES:
patent: 4542501 (1985-09-01), Chevalet et al.
patent: 4543629 (1985-09-01), Carey et al.
patent: 4580261 (1986-04-01), Pelotte
patent: 4586175 (1986-04-01), Bedard et al.
patent: 4593282 (1986-06-01), Acampora et al.

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