Non-recursive analog integrator

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364605, 364830, 364862, G06G 7184

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046690557

ABSTRACT:
A non recursive analog integrator providing M integrations of a sampled analog signal Vn,m. The integrator comprises a series parallel demultiplexer with N outputs, N capacitors each with an electrode connected to a floating potential with respect to a reference potential, and a parallel series multiplexer with N inputs, the respective capacitors being connected in parallel between the outputs of the demultiplexer and the inputs of the multiplexer. Each capacitor performs, at each integration, the summation in form of charges of the sample of corresponding rank of the sampled analog signal Vn,m. So, at the end of the M integrations, an analog signal- ##EQU1## is obtained at the output of the multiplexer. Charge transfer devices serve as the series parallel demultiplexer and as the parallel series multiplexer.

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patent: 4524424 (1985-06-01), White
IEEE Journal of Solid-State Circuits, vol. SC-13, No. 1, Feb. 1978, IEEE, New York (US), E. F. Barbe et al.: "Signal Processing . . .", pp. 34-51.
IEEE Transactions on Electron Device, vol. ED-26, No. 4, Apr. 1979, IEEE, New York (US), D. A. Gandolfo et al.: "Analog-binary . . .", pp. 596-603.
IEEE Journal of Solid-State Circuits, vol. SC-14, No. 4, Aug. 1978, IEEE, New York (US), C. P. Traynar et al.: "A Nonrecursive Signal . . . ", pp. 742-746.

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