High electron mobility transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257194, 257200, 257 19, 257616, H01L 31072, H01L 31109, H01L 2906, H01L 31117

Patent

active

052850889

ABSTRACT:
A semiconductor device capable of reducing element sizes exceedingly and a mask alignment accuracy in lithography is provided. This device has a pair of semiconductor layers for source/drain electrodes formed on the field insulating film so as to be respectively partially projected in a "overhanging-shape" over the active area. For example, using an MBE method, a selectively epitaxial growth is made with these semiconductor layers as nuclei, so that first and second semiconductor layers at the interface of which a channel is formed and a pair of semiconductor layers for source and drain electrode connections can be formed. Accordingly, the semiconductor heterojunction and gate electrode can be formed in self-alignment on the active area with the semiconductor layers pair for source/drain electrodes as the reference, so that a reduction in transistor size can be realized. It is preferable that the first semiconductor layer and second semiconductor layer making a heterojunction are made of an undoped monocrystalline SiGe layer and a monosilicon layer inverse in electroconductive polarity to the substrate, respectively. The semiconductor layers for source/drain electrode connections are preferable to have a two-level structure made of a polycrystalline SiGe layer and a polysilicon layer.

REFERENCES:
patent: 4677735 (1987-07-01), Malhi
patent: 5155571 (1992-10-01), Wang et al.
patent: 5187379 (1993-02-01), Noda
"High Hole Mobility in Modulation-Doped p-Si.sub.0.5 Ge.sub.0.5 /Ge/Si.sub.1-X5 Ge.sub.x5 Hetrostructures Fabricated Using Molecular Beam Epitaxy", by Eiichi Murakami et al., Extended Abstracts of the 21st Conference on Solid State Devices and Materials, Tokyo 1989, pp. 373-376.
"Ultra High Hole Mobility In Strain-Controlled Si-Ge Modulation-Doped FET", E. Murakami et al., IEEE, IEDM 90, 1990, pp. 375-378.
"Si/SiGe p-Channel MOSFETs", by S. Subbanna et al., 1991 VLSI Technology 11-1, pp. 103-104.

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