Digital Signal Processor employing a random-access memory and me

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G06F 750

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active

058986049

ABSTRACT:
The invention relates to a digital signal processor with a RAM (random-access memory) having its output connected to a first input and, through a first temporary storage device to a second input of a multiplier, with an adder following the multiplier, and with a clock device for controlling data-word transfers. The speed of the processor is increased by connecting a second auxiliary storage device between the RAM and the first input of the multiplier and providing a first switching element via which the RAM and the second temporary storage device are connectable to the first input of the multiplier.

REFERENCES:
patent: 3814924 (1974-06-01), Tate
patent: 4190894 (1980-02-01), Mudge
patent: 4484301 (1984-11-01), Borgerding
patent: 4722068 (1988-01-01), Kuroda et al.
patent: 4809212 (1989-02-01), New et al.
patent: 5121431 (1992-06-01), Wiener
Patent Abstract of Japan, vol. 010, No. 162 (P-466), Jun. 10 1986 -& JP 61 015233A (SONYKK),Jan. 23 1986.
Murakami, "A Multiplier-Accumulator Macro For A 45 Mips Embedded RISC Processor", IEEE Journal of Solid-State Circuits, Bd.31, Nr. 7, Jul. 1996.

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