Digital phase-locked loop

Details Digital phase-locked loop Digital phase-locked loop

1993-10-25

1994-08-02

Groody, James J.

Television

Synchronization

Automatic phase or frequency control

348540, H04N 512

Patent

active

053350189

ABSTRACT:
A digital phase-locked loop (PLL) which responds to a square-wave input signal of on expected frequency f.sub.E and comprises a change-over switch which is switched in response to square-wave signals or different frequencies and precedes a main divider operating with a divisor D and which produces the output signal of the phase-locked loop. The change-over switch is activated as a function of the output signal and the input signal. In order to provide symmetrical locking in of the phase-locked loop and a small capture-and-hold range, the change-over switch is switched between a first square-wave signal of the frequency f.sub.1, a second square-wave signal of the second frequency f.sub.2 and a third square-wave signal of the frequency f.sub.3, in which:

REFERENCES:
patent: 3621125 (1971-11-01), Parker
patent: 3983498 (1976-09-01), Malek
patent: 4308619 (1981-12-01), Hughes
patent: 4309662 (1982-01-01), Baudoux
patent: 4400817 (1983-08-01), Sumner
patent: 4611229 (1986-09-01), Stivastava et al.
patent: 4691327 (1987-09-01), Wenger

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