Power-up circuit for semiconductor memory device

Details Power-up circuit for semiconductor memory device Power-up circuit for semiconductor memory device

1999-01-29

2000-08-01

Nelms, David

Static information storage and retrieval

Powering

365194, 327540, G11C 700

Patent

active

060976594

ABSTRACT:
A power-up circuit for a semiconductor memory device includes an external supply voltage level detector for detecting an external supply voltage level received from an exterior, and generating an external supply voltage detection signal when a predetermined voltage level is detected, an internal supply voltage level detector for detecting an internal supply voltage level and generating an internal supply voltage detection signal when a predetermined voltage level is detected, and a power-up signal generator for receiving the internal and external supply voltage detection signals and generating a low level power-up signal at a falling edge of the internal supply voltage detection signal. The circuit prevents an access of the external device, thereby preventing the generation of an excessive current such as a latch-up caused by an instability at the internal nodes and the unstable operation of the internal circuit.

REFERENCES:
patent: 5319601 (1994-06-01), Kawata et al.
patent: 5349559 (1994-09-01), Park et al.
patent: 5352935 (1994-10-01), Yamamura et al.
patent: 5408435 (1995-04-01), McClure et al.
patent: 5557579 (1996-09-01), Raad et al.
patent: 5768207 (1998-06-01), Raad et al.

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