Repetitious logic state signal generation apparatus

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Details

Other Related Categories

371 16, G06F 1100, G06F 1114, G06F 1122

Type

Patent

Status

active

Patent number

044411820

Description

ABSTRACT:
Apparatus as disclosed which comprises a register normally operable in the parallel data in/parallel data out mode but which has control mechanisms for allowing it to be converted to a serial data in/serial data out register. This register comprises part of a register based state machine. When the register is locked in a given mode so that a predefined control bit pattern is maintained within the register while the rest of the state machine operates in a normal manner, the control bit pattern is iteratively executed which in turn allows the use of an oscilloscope to observe signals in the signal transmission path of the state machine.

REFERENCES:
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patent: 3579199 (1971-05-01), Anderson et al.
patent: 3831148 (1974-08-01), Greenwald et al.
patent: 3940601 (1976-02-01), Henry et al.
patent: 3961252 (1976-06-01), Eichelberger
patent: 4034195 (1977-07-01), Bates
patent: 4047163 (1977-09-01), Choate et al.
patent: 4107649 (1978-08-01), Kurihara
patent: 4139147 (1979-02-01), Franke
patent: 4249173 (1981-02-01), Lockhart, Jr.
patent: 4287594 (1981-09-01), Shirasaka
patent: 4313200 (1982-01-01), Nishiura
patent: 4335457 (1982-06-01), Early
patent: 4357703 (1982-11-01), Van Brunt
IBM Technical Disclosure Bulletin, "Pattern Generator for a Mulipart Number Test System, " vol. 19, No. 9, Feb. 1977 pp. 3487-3488.

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