1996-05-15
1998-02-03
Canney, Vincent P.
Excavating
G06F 1100
Patent
active
057152535
ABSTRACT:
A ROM repair circuit comprising a ROM cell array having a plurality of cells, each of the cells storing information inputted through a corresponding one of a plurality of bit lines under a control of data inputted through a corresponding one of a plurality of word lines, column and row address detectors for detecting column and row addresses corresponding to a failed one of the cells in the ROM cell array from addresses applied in a test mode and generating error detect signals in accordance with the detected results, respectively, and column and row address converters responsive to the error detect signals from the column and row address detectors to replace the column and row addresses corresponding to the failed one of the cells in the ROM cell array with different column and row addresses corresponding to a different one of the cells in the ROM cell array in which is stored the same information as normal information stored in the failed cell prior to the failure.
REFERENCES:
patent: 3633175 (1972-01-01), Harper
patent: 4890286 (1989-12-01), Hirose
patent: 5200959 (1993-04-01), Gross et al.
Kim Jong Ho
Shin Moon Cheol
Canney Vincent P.
LG Semicon Co. Ltd.
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