Semiconductor memory device having a meshlike grounding wiring

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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257393, 257903, H01L 2978

Patent

active

053348630

ABSTRACT:
In an SRAM having TFT type memory cells, a pair of driver transistors and a pair of access transistors formed of N-channel MOS transistors on a silicon substrate are respectively arranged at positions point symmetric with respect to the center of gravity of the memory cell, and a pair of load transistors formed of P-channel type TFTs is also arranged in point symmetric positions with respect to the center of gravity. The gate electrodes of these N-channel MOS transistors and a word line are formed of a first layer of conductor film, a grounding wiring within the memory cell is formed of a second layer of conductor film, and TFTs are formed of a third and a fourth layers of conductor films. Two connecting holes for the digit lines and the drain regions of the access transistors are also arranged distributed point symmetric with respect to the center of gravity. As a result, the grounding wiring is extended respectively in the direction parallel to the word line and in the direction parallel to the digit lines, forming a meshlike shape. The relative resistance value of the grounding wiring is decreased and its bit dependence is also reduced. Because of this, the detection sensitivity at the time of read is improved. Moreover, due to the above-mentioned shape of the grounding wiring, the space between the channel region of the TFT and the gate electrode of the driver transistor can be shielded by the grounding wiring, and the leakage characteristic of the TFT can be improved.

REFERENCES:
patent: 5072286 (1991-12-01), Minami et al.
patent: 5132771 (1992-07-01), Yamanaka et al.

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