Semiconductor chip carrier including an interconnect component i

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257697, H01L 2348

Patent

active

060970863

ABSTRACT:
A semiconductor die carrier may include an insulative substrate; an array of groups of multiple electrically conductive contacts arranged in rows and columns on the insulative substrate, wherein the groups from adjacent rows are staggered as are the groups from adjacent columns, and a portion of each group overlaps into an adjacent row or an adjacent column of the groups of the array; a semiconductor die; and structure for providing electrical connection between the semiconductor die and the conductive contacts. A semiconductor die carrier may also include an insulative substrate; a plurality of leads each having an external portion extending out of the semiconductor die. carrier from a lower surface of the insulative substrate and an internal portion located within the semiconductor die carrier at an upper surface of the insulative substrate; a semiconductor die; and a layer of conductive material in contact with conductive portions of the semiconductor die and also in contact with the internal portions of the leads.

REFERENCES:
patent: 3326726 (1967-06-01), Bassett, Jr. et al.
patent: 3337838 (1967-08-01), Damiano et al.
patent: 3366915 (1968-01-01), Miller
patent: 3444506 (1969-05-01), Wedekind
patent: 3848221 (1974-11-01), Lee, Jr.
patent: 4274700 (1981-06-01), Keglewitsch et al.
patent: 4487463 (1984-12-01), Tillotson
patent: 4530002 (1985-07-01), Kanai
patent: 4572604 (1986-02-01), Ammon et al.
patent: 4616406 (1986-10-01), Brown
patent: 4654472 (1987-03-01), Goldfarb
patent: 4655526 (1987-04-01), Shaffer
patent: 4667220 (1987-05-01), Lee et al.
patent: 4698663 (1987-10-01), Sugimoto et al.
patent: 4724472 (1988-02-01), Sugimoto et al.
patent: 4734042 (1988-03-01), Martens et al.
patent: 4897055 (1990-01-01), Jurista et al.
patent: 4943846 (1990-07-01), Shirling
patent: 4959750 (1990-09-01), Cnyrim et al.
patent: 4975066 (1990-12-01), Sucheski et al.
patent: 4997376 (1991-03-01), Buck et al.
patent: 5015207 (1991-05-01), Koepke
patent: 5037311 (1991-08-01), Frankeny et al.
patent: 5071363 (1991-12-01), Rylek et al.
patent: 5081563 (1992-01-01), Feng et al.
patent: 5106461 (1992-04-01), Volfson et al.
patent: 5110760 (1992-05-01), Hsu
patent: 5117069 (1992-05-01), Higgins, III
patent: 5123164 (1992-06-01), Shaheen et al.
patent: 5137456 (1992-08-01), Desai et al.
patent: 5200357 (1993-04-01), Collot et al.
patent: 5281151 (1994-01-01), Arima et al.
patent: 5309024 (1994-05-01), Hirano
patent: 5326936 (1994-07-01), Taniuchi et al.
patent: 5330372 (1994-07-01), Pope et al.
patent: 5334279 (1994-08-01), Gregoire
patent: 5342999 (1994-08-01), Frei et al.
patent: 5351393 (1994-10-01), Gregoire
patent: 5371404 (1994-12-01), Joskey et al.
patent: 5376825 (1994-12-01), Tukamoto et al.
patent: 5390412 (1995-02-01), Gregoire
patent: 5418471 (1995-05-01), Kardos
patent: 5508556 (1996-04-01), Lin
patent: 5536362 (1996-07-01), Love et al.
patent: 5569955 (1996-10-01), Chillara et al.
patent: 5575688 (1996-11-01), Crane, Jr.
patent: 5578870 (1996-11-01), Farnsworth
patent: 5593322 (1997-01-01), Swamy et al.
patent: 5611884 (1997-03-01), Bearinger et al.
patent: 5634821 (1997-06-01), Crane, Jr.
patent: 5639247 (1997-06-01), Johnson et al.
patent: 5641309 (1997-06-01), Crane, Jr.
patent: 5645433 (1997-07-01), Johnson et al.
patent: 5646442 (1997-07-01), Abe et al.
patent: 5702255 (1997-12-01), Murphy et al.
patent: 5824950 (1998-10-01), Mosley et al.
patent: 5854512 (1998-12-01), Manteghi
Robert Barnhouse, "Bifurcated Through-Hole Technology--An Innovative Solution To Circuit Density," Connection Technology, pp. 33-35 (Feb. 1992).
"AMP-ASC Interconnection Systems," AMP Product Information Bulletin, pp. 104 (1991).
"Micro-Strip Interconnection System," AMP Product Guide, pp. 3413-3414 (Jun., 1991).
"Rib-Cage II Through-Mount Shrouded Headers" and "Micropax Board-to-Board Interconnect System," DuPont Connector Systems Product Catalog A, pp. 2-6, 3-0, 3-1 (Feb., 1992).
R.R. Tummala et al., "Microelectronics Packaging Handbook," Van Nostrand Reinhold, 1989, pp. 38-43, 398-403, 779-791, 853-859, and 900-905.
"Packaging," Intel Corporation, 1993, p. 2-36, 2-96, 2-97, 2-100, 3-23, 3-24, and 3-25.
George D. Gregoire, "3-Dimensional Circuitry Solves Fine Pitch SMT Device Assembly Problem." Connection Technology.
Dimensional Circuits Corporation, "Dimensional Circuits Corp. Awarded Two U.S. patents," D.C.C. News, Apr. 5, 1994.
George D. Gregoire, "Very Fine Line Recessed Circuitry--A New PCB Fabrication Process".
"AMP Product Guide, Printed Circuit Board Connectors" p. 3008, 3067-68, 3102-03, 3122-23.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor chip carrier including an interconnect component i does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor chip carrier including an interconnect component i, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor chip carrier including an interconnect component i will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-666766

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.