Semiconductor memory device having hierarchical word line struct

Details Semiconductor memory device having hierarchical word line struct Semiconductor memory device having hierarchical word line struct

1997-10-29

1999-10-12

Nelms, David

Static information storage and retrieval

Addressing

Plural blocks or banks

365 53, 365 63, 365226, G11C 800

Patent

active

059663405

ABSTRACT:
Conductive lines for electrostatic shielding including at least one signal line are arranged between a global data I/O bus line and a ground line transmitting a ground voltage to a nonselected word line through a sub-decoder. Capacitive coupling between bus lines included in the global data I/O bus and the ground line is suppressed, and floating up of a ground voltage on the nonselected word line is prevented.

REFERENCES:
patent: 5282175 (1994-01-01), Fujita et al.
patent: 5587959 (1996-12-01), Tsukude

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