Semiconductor calibration structures and calibration wafers for

Details Semiconductor calibration structures and calibration wafers for Semiconductor calibration structures and calibration wafers for

1998-05-29

2000-08-01

Bueker, Richard

Measuring and testing

Instrument proving or calibrating

Volume of flow, speed of flow, volume rate of flow, or mass...

216 2, 216 84, 438 14, 427336, G01N 1102

Patent

active

060949651

ABSTRACT:
Semiconductor wafer coating system calibration structures and methods are described. In one embodiment, a calibration structure includes a perimetral edge bounding a calibration body. A calibration edge is spaced from the perimetral edge and is positioned over the calibration body. Together, the edges define a distance therebetween which is configured to calibrate a wafer coating system. In a preferred embodiment, the edges define respective termination distances configured to calibrate multiple different wafer coating systems. In another embodiment, a calibration pattern is formed over a semiconductor wafer. A layer of material is formed over the calibration pattern by a coating system, and selected portions thereof removed by the system. The positions of unremoved portions of the layer of material are inspected relative to the calibration pattern to ascertain whether the coating system removed the selected portions within desired tolerances. If not, the coating system is calibrated to within desired tolerances.

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