Data transferring buffer

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395877, 39520002, G06F 1312

Patent

active

057404682

ABSTRACT:
Data transferring buffer circuits for data exchange include a plurality of buffers corresponding to a plurality of data sources for independently receiving and storing data sent from the plurality of data sources, and a buffer limit signal generating circuit for delivering a buffer limit signal when the amount of data stored in a buffer reaches a predetermined limit. The buffer circuits also include a data read signal generating circuit for selecting one of the buffers and generating a data reading signal for the selected buffer. The data reading signal is generated based on a remaining amount of data and information concerning a vacancy at a buffer to which data is to be supplied. The buffer circuits also include a selected data delivery circuit for adopting data selected by the data read signal generating circuit and for delivering the adopted data.

REFERENCES:
patent: H62 (1986-05-01), Sanderson
patent: 3936600 (1976-02-01), Galbraith
patent: 4114750 (1978-09-01), Baeck et al.
patent: 4169991 (1979-10-01), Ross
patent: 4204779 (1980-05-01), Lee et al.
patent: 4325120 (1982-04-01), Colley et al.
patent: 4381553 (1983-04-01), Ferguson
patent: 4396307 (1983-08-01), Shah et al.
patent: 4455645 (1984-06-01), Mijioka et al.
patent: 4467411 (1984-08-01), Fry et al.
patent: 4480541 (1984-11-01), Grummett
patent: 4511928 (1985-04-01), Colomb
patent: 4514807 (1985-04-01), Nogi
patent: 4516201 (1985-05-01), Warren et al.
patent: 4602341 (1986-07-01), Gordon et al.
patent: 4611322 (1986-09-01), Larson et al.
patent: 4616337 (1986-10-01), Sheth
patent: 4623996 (1986-11-01), McMillen
patent: 4646061 (1987-02-01), Bledsoe
patent: 4722085 (1988-01-01), Flora et al.
patent: 4729020 (1988-03-01), Schaphorst et al.
patent: 4797951 (1989-01-01), Duxbury et al.
patent: 4814970 (1989-03-01), Barbagelata et al.
patent: 4829421 (1989-05-01), Ritchie
patent: 5060140 (1991-10-01), Brown et al.
patent: 5326181 (1994-07-01), Eisner et al.
Akiyama, Minoru, "Modern Communication Exchange Engineering", Denki Shoin, 1973, p. 66.
"Nikkei Electronics", Nihon Keizai Shinbunsha, Dec. 21, 1981, pp. 88-108.
Michel Dubois, Christoph Scheurich, Faye Briggs, "Memory Access Buffering in Multiprocessors", 1986 IEEE, pp. 434-442.
Nobuhiko Koike, Kenji Ohmori, Tohru Sasaki, "HAL: A High-Speed Logic Simulation Machine", 8219 IEEE Design & Test of Computers 2 (1985) Oct. No. 5, New York USA, pp. 61-73.
M. Soegaard-Knudsen, M.Sc., "Hierarchical specification and switch-level simulation of digital circuits", IEE Proceedings, vol. 132, Pts. E and I. No. 2, Mar. Apr. 1985, pp. 102-107.
"Scientific computer simulates VLSI circuits in record time", Electronic Design, Mar. 7, 1985, pp. 153-159.
European Search Report conduct by Examiner Soler J.M.B. and completed Feb. 15, 1991 at the Hague.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Data transferring buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data transferring buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data transferring buffer will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-648530

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.