Patent
1996-12-09
1998-04-14
Moore, David K.
395 11, 395 23, 395 24, G06F 1516, G06F 1518
Patent
active
057403252
ABSTRACT:
A computing device, which may be implemented as an integrated circuit, is constructed of a microprocessor and one or more neural network co-processors. The microprocessor normally executes programs which transfer data to the neural network co-processors, which are used to compute complicated mathematical functions. Direct Memory Access (DMA) is also used to transfer data.
Each neural network co-processor interfaces to the microprocessor in a manner substantially similar to that of a conventional memory device. The co-processor does not require any instructions and is configured to execute mathematical operations simply by being pre-loaded with gating functions and weight values. In addition, the co-processor executes a plurality of arithmetic operations in parallel, and the results of such operations are simply read from the co-processor.
REFERENCES:
patent: 5274743 (1993-12-01), Imondi
patent: 5583964 (1996-12-01), Wang
Lindsey Michael K.
Moore David K.
Motorola Inc.
Smith Jeffrey
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