Method for determining and processing correction values for self

Coded data generation or conversion – Converter calibration or testing

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341118, H03M 110

Patent

active

050122410

ABSTRACT:
A self-calibrating A/D and D/A converter includes a binary weighted converter network, a calibrating and correction network, a calculating register, and a successive approximation register controlling the converter network and controlling the calibrating and correction network with the calculating register. A method and calculating register for determining and processing correction values for the converter according to the principle of successive approximation include, in a calibration phase, beginning with the most significant network element, measuring error terms with the calibration and correction network for each weighted network element of the converter network, by comparison with the sum of all of the lower-weighted network elements; calculating a correction value for each network element of the converter network as one-half the difference of the associated error term and the sum of all of the correction values for higher-weighted network elements, with the calculating register having the sum register; storing each calculated correction value in a memory; in a conversion phase, beginning with the most significant network element, retrieving the associated correction value from the memory and adding the correction value to the contents of the sum register upon setting of a weighted network element, outputting the correction value at the calibration and correction network; and adding the correction value to the contents of the sum register or discarding the correction value as a function of a comparator decision.

REFERENCES:
patent: 3483550 (1969-12-01), Max
patent: 4340882 (1982-07-01), Maio et al.
patent: 4354245 (1982-10-01), Delegue
patent: 4399426 (1983-08-01), Tan
patent: 4451821 (1984-05-01), Domogalla
patent: 4894656 (1990-01-01), Hwang et al.
patent: 4908621 (1990-03-01), Polonio et al.

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