Digital variable group delay equalizer for a digital television

Details Digital variable group delay equalizer for a digital television Digital variable group delay equalizer for a digital television

1983-06-24

1985-07-23

Shepperd, John W.

Facsimile and static presentation processing

Static presentation processing

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358 39, 358325, 358326, H04N 504

Patent

active

045311498

ABSTRACT:
Digital TV receivers which digitally process chroma and luma signals in different channels and convert the digital signals to analog form before matrixing will include low pass analog filters after the DAC's to remove clock switching components. The luma and chroma analog filters will impose differing group delay on their respective signals. This creates a differential phase error between the analog signals which is corrected by predictively delaying the signal which leads in phase in the DAC. This is accomplished by using clocked digital-to-analog converters forced to operate synchronously with the data stream and appropriately delaying the clock signal applied to one of the DAC's relative to the other.

REFERENCES:
patent: 4018990 (1977-04-01), Long et al.
patent: 4051519 (1977-09-01), Harwood
patent: 4135105 (1979-01-01), Stange
patent: 4219838 (1980-08-01), Rossi
patent: 4230953 (1980-10-01), Wilcox
patent: 4297641 (1981-10-01), Sterzer
E. Lerner, "Digital TV: Makers Bet on VLSI", IEEE Spectrum, 2/83, pp. 39-43.
TRW LSI Product Data Sheet--Model TDC1016J, Monolithic Video D/A Converters, 6/79.
B. Amazeen et al., "Monolithic d-a Converter Operates on Single Supply," Electronics, Feb. 28, 1980, pp. 125-131.

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