System for limiting access to non-volatile memory in electronic

Details System for limiting access to non-volatile memory in electronic System for limiting access to non-volatile memory in electronic

1983-07-18

1986-03-25

Thomas, James D.

Boots, shoes, and leggings

371 62, 365195, 364466, 340799, 340814, G06F 1214, G06F 1312

Patent

active

045787743

ABSTRACT:
A method and associated apparatus for limiting the erasing and writing of data in the non-volatile memory (NVM) of an electronic postage meter operated under microcomputer control to predetermined periods of time after the power up and during the power down cycles of the meter, comprising the steps and associated apparatus for providing an output power signal in response to the establishment of a power up voltage condition, generating an output pulse in response to the presence of the output power signal, presetting the width of the output pulse to provide sufficient time to erase the desired data words from the NVM, applying a bias enable signal to an NVM enable terminal during the duration of the output pulse, enabling the remaining terminals of the NVM during the duration of the output pulse to allow the erasure of data from the NVM, removing the output power signal in response to a power down voltage condition, interrupting the operation of the microcomputer in response to the removal of the output power signal to ready the microcomputer for writing data in NVM, applying the bias enable signal to the NVM enable terminal at the inception of the power down cycle, enabling the remaining terminals of the NVM to allow the writing of data into the NVM during power down for a predetermined time period, and biasing the terminals of the NVM during normal postage meter operation to preclude writing of data into and erasure of data from the NVM.

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