Boundary scan system with improved error reporting using sentine

Details Boundary scan system with improved error reporting using sentine Boundary scan system with improved error reporting using sentine

1994-05-25

1996-04-30

Ramirez, Ellis B.

Excavating

371 492, 371 53, 371 572, G01R 313183

Patent

active

055131891

ABSTRACT:
A boundary scan bus error reporting circuitry loads an unused sentinel bit pattern into the boundary scan instruction register in a conventional error reporting boundary scan test system. The unused sentinel bit pattern signifies that a fault exists somewhere upstream of the instruction register in the boundary scan circuitry associated with a specific integrated circuit. The special sentinel pattern is loaded into the instruction register in response to an illegal instruction control signal generated by an instruction decoder coupled to the instruction latch in the boundary scan architecture.

REFERENCES:
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patent: 5155732 (1992-10-01), Jarwala et al.
patent: 5168499 (1992-12-01), Peterson et al.
patent: 5173905 (1992-12-01), Parkinson et al.
patent: 5303246 (1994-04-01), Anderson et al.
patent: 5331274 (1994-07-01), Jarwala et al.
patent: 5390351 (1995-02-01), Di Giulio et al.

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