Fishing – trapping – and vermin destroying
Patent
1996-06-10
1997-07-29
Tsai, Jey
Fishing, trapping, and vermin destroying
437 60, 437919, H01L 218242
Patent
active
056521650
ABSTRACT:
The present invention provides a method of manufacturing a stacked capacitor having a double walled crown shape. The method begins by providing a field effect transistor adjacent to a field oxide region in a substrate. Next, a first insulating layer and a barrier layer is formed over the resultant surface. A node contact opening is then etched in the barrier layer and the first insulation layer exposing a source region of the transistor. A first conductive layer is formed in the node contact opening and covers the first silicon nitride layer. A masking block is then formed over at least the node contact hole. First conductive spacers are then formed on the sidewalls of the masking block. Nitride spacers are formed on the sidewalls of the first conductive spacers. Second conductive spacers are formed on the sidewalls of the nitride spacers. The first conductive layer is anisotropically etched using the cylinder block, first conductive spacers, and the dielectric spacers as a mask. The masking block and the nitride spacers are removed thereby forming a double wall crown shape bottom electrode. A capacitor dielectric layer and top plate are formed to complete the capacitor.
REFERENCES:
patent: 5185282 (1993-02-01), Lee et al.
patent: 5438010 (1995-08-01), Saeki
patent: 5476806 (1995-12-01), Roh et al.
patent: 5491103 (1996-02-01), Ahn et al.
Lu Chih-Yuan
Tseng Horng-Huei
Saile George O.
Stoffel William J.
Tsai Jey
Vanguard International Semiconductor Corporation
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