Clock recovery phase locked loop control using clock difference

Details Clock recovery phase locked loop control using clock difference Clock recovery phase locked loop control using clock difference

1994-12-02

1996-04-30

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 11, 331 14, 331 25, 331DIG2, H03L 7087, H03L 7095

Patent

active

055128602

ABSTRACT:
A method of generating output clock pulses using a phase locked loop which includes a voltage controlled oscillator (VCO) is comprised of providing a sequence of data pulses and a sequence of reference clock pulses, resetting the phase locked loop to force the VCO to its lowest operating frequency, releasing reset of the phase locked loop and forcing the VCO to lock to a multiple of the frequency of the reference clock pulses, detecting the presence of data pulse transitions, in the event of detection of data pulse transitions, forcing the VCO to lock to the data pulses, and outputting output clock pulses from the phase locked loop.

REFERENCES:
patent: 4365211 (1982-12-01), Lee
patent: 4688205 (1987-08-01), Abiko
patent: 5157355 (1992-10-01), Shikakura et al.

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