Patent
1988-04-26
1990-06-12
Hille, Rolf
357 59, 357 51, 357 43, H01L 2906, H01L 2904, H01L 2702
Patent
active
049337394
ABSTRACT:
A vertical trench etched several microns deep into the silicon extending into a buried diffusion region is used to confine a vertical interconnect element. This element can be a high resistivity undoped polycrystalline silicon load resistor, a medium resistivity doped polycrystalline silicon load resistor, or a low resistivity interconnect to the buried diffusion region. This new structure can be used in compact and scalable MOS and bipolar inverters and in bistable memory storage cells.
REFERENCES:
patent: 3617826 (1971-11-01), Kobayashi
patent: 4569122 (1986-02-01), Chan
Chatterje et al., IEEE, IDEM-86, "Trench and Compact Structures for dRAMS" (1986) pp. 128-131.
Ueno et al., IEEE, IDEM 87, "A SUB-40 PS ECL Circuit at a Switching Current of 1.28 MA" (1987) pp. 371-374.
Komatsu et al., IEEE Journal of Solid-State Circuits, "A 35-ns 128KX8 CMOS SRAM" (1987) 22:721-726.
Hanamura et al., IEEE Int. Solid-State Circuits Conference, "High Density SRAMs" (1987) pp. 250-251 and 414.
Oguie et al., IEEE Journal of Solid-State Circuits, "31-ns, 500-mW, 64-kbit ECL RAM Using HI-BICMOS Technology" (1986) 21:681-658.
Oguie et al.,, IEEE, IDEM 86, "Technology Improvement for High Speed ECL RAMs" (1986) pp. 468-471.
Caserza Steven F.
Hille Rolf
Limanek Robert P.
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