BiCMOS output driver

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307270, 307473, 307264, 307570, 307443, H03K 1901

Patent

active

049335740

ABSTRACT:
A bipolar transistor and two field-effect transistors are connected in a BiCMOS pull-down configuration to pull-down to a (first) predetermined potential level the potential developed on an output line when a high logic level potential is developed on an input line. To maximize switching speed and to minimize ground bounce (transients), the bipolar transistor is not permitted to go into saturation. A pair of transistors, connected in an inverter configuration, develop a signal which indicates when the bipolar transistor pulls-down the level of the potential on the output line below a (second) predetermined potential level. From a signal developed from the input line signal and a signal developed from the inverter developed signal, a gate develops a signal which drives a transistor that pulls-down from the (first) predetermined potential level to a low logic level potential the output line potential three gate delay times after the output line potential level falls below the (second) predetermined potential level.

REFERENCES:
patent: 4707623 (1987-11-01), Bismark
patent: 4769561 (1988-09-01), Iwamura et al.
patent: 4779014 (1988-10-01), Masuoka et al.
patent: 4785203 (1983-11-01), Nakamura

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