Method for manufacturing semiconductor memory device having impr

Details Method for manufacturing semiconductor memory device having impr Method for manufacturing semiconductor memory device having impr

1988-12-12

1991-07-09

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 60, 437228, 437919, H01L 2170

Patent

active

050305867

ABSTRACT:
In the semiconductor memory device according to the present invention, a n type drain diffused region (9a) to be connected to a bit line (12) is formed on a p type semiconductor substrate (1) and a n type source diffused region (9b) is formed with a prescribed spacing from the n type drain region (9a). On the p type silicon substrate (1), a p type diffused region (16a) of high impurity density and p type diffused region (16b) of high impurity density are formed in such a manner that they are in contact with the n type drain diffused region (9a) and the n type source diffused region (9b), respectively, but not in the channel region of the n channel MOS transistor (18). Consequently, the .alpha. particle-generated charges can be decreased without changing the threshold voltage of the transfer gate transistor.

REFERENCES:
patent: 4506436 (1985-03-01), Balceman, Jr. et al.
patent: 4507159 (1985-03-01), Erb
patent: 4833647 (1989-05-01), Maed et al.
A. Mohsen et al., High Density, High Performance DRAM Cell, 1982 IEEE, IEDM, vol. 82, pp. 616-619.

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