Complementary MOSFET logic circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307451, 307475, H03K 19092, H03K 19003, H03K 1901, H03K 19094

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active

045582343

ABSTRACT:
Disclosed is a complementary MOSFET logic circuit having a complementary MOS inverter with a pregiven ratio of the channel widths of a P channel MOSFET and an N channel MOSFET and pregiven threshold voltages of the FETs so as to have an input voltage characteristic adapted to an output voltage characteristic, and a buffer circuit which includes a bipolar transistor for receiving at the base thereof a signal from the output terminal of the complementary MOS inverter and an N channel MOSFET for receiving at the gate thereof an input signal applied to the complementary MOS inverter. The inverter and buffer are connected in series to one another between a high potential applying point and a low potential applying point, and a signal corresponding to a logic output signal of the complementary MOS inverter is produced at the output terminal thereof.

REFERENCES:
patent: 3609479 (1971-09-01), Lin et al.
patent: 3631528 (1971-12-01), Green
patent: 3649843 (1972-03-01), Redwine et al.
patent: 4032795 (1977-06-01), Hale
patent: 4192016 (1980-03-01), Taylor
patent: 4258272 (1981-03-01), Huang
patent: 4280065 (1981-07-01), Minato et al.
patent: 4295065 (1981-10-01), Hsieh et al.
patent: 4301383 (1981-11-01), Taylor
patent: 4406957 (1983-09-01), Atherton
patent: 4425516 (1984-01-01), Wanlass
"CMOS: Higher Speeds, More Drive and Analog Capability Expand Its Horizons", Bingham, 2328 Electronic Design, vol. 26, No. 23, (Nov. 1978), pp. 74-82.
Zusammenschaltung von Digitalen CMOS-Schaltkreisen Mit Anderen Logik-Familien, Turinsky, Radio Fernsehen Elektronic, 26, (1977), H.3, pp. 76-78.

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