Boots – shoes – and leggings
Patent
1984-12-24
1988-02-23
Malzahn, David H.
Boots, shoes, and leggings
G06F 752
Patent
active
047275073
ABSTRACT:
A multiplication circuit used for a high speed multiplier in a computer system is basically constituted by a multiplier and a carry propagating adder. The multiplier obtains a sum and carry per each bit by using carry save adder trees having a plurality of carry save adders, and generates a carry generation function and a carry propagation function based on the sum and carry by using a generation/propagation unit. The carry propagating adder obtains a final product based on the carry generation function and carry propagation function, and the carry generation function and carry propagation function generated by the generation/propagation unit are fed back to a final stage of the carry save adder.
REFERENCES:
patent: 3840727 (1974-10-01), Amdahl et al.
patent: 4041292 (1977-08-01), Kindell
Wallace, "A Suggestion for a Fast Multiplier" IEEE Trans. on Electronic Computers Feb. 1964, pp. 14-17.
Saunders, "High-Speed Multiplier" IBM Tech. Disclosure Bulletin vol. 13, No. 2, Jul. 1970, pp. 546-548.
Singh, "Multiplier Decoder" IBM Tech. Disclosure Bulletin vol. 18, No. 12, May 1976, pp. 4107-4108.
Shen et al "Elimination of Spill Adderin High-Speed Multiplier" IBM Tech. Disclosure Bulletin vol. 24, No. 3, Aug. 1981, pp. 1397-1399.
Fujitsu Limited
Malzahn David H.
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