High density integrated circuit package

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

357 75, 357 80, 361380, 361412, 361414, 174 52FP, H01L 2302

Patent

active

047274107

ABSTRACT:
A multifaceted package is disclosed that permits VLSI and VHSIC integrated circuits in the form of integrated circuit die or chip carries to be mounted on the faces of the package to form a high-density circuit package. The package comprises a plurality of ceramic layers which are cofired and fused together to form a monolithic body having a plurality of planar faces. The body may have a cubic, pyramidal, pentagonal, or other solid geometric form and may have integrated circuit elements disposed on one or more faces of the body. Integrated circuit die or dies discrete electrical components such as chip carriers, resistors, etc. may be mounted to faces of the body and a lid may be provided for hermetic encapsulation of integrated circuit die between lids and respective faces of the body. In another embodiment, integrated circuit die or dies are disposed in a carrier comprising a plurality of ceramic layers which are cofired and fused to form a monolithic body and having conductive paths and vias on and through selected ones of the layers for electrical interconnection of the die or dies with contact sites provided on respective faces of the body. Selected faces of the body may be provided with contact sites oriented to mate with contacts of standard leaded or leadless chip carriers. The body may additionally be provided with means to facilitate removal of heat generated during operation by integrated circuit devices disposed on respective body faces or devices disposed in carriers attached to respective body faces.

REFERENCES:
patent: 3346773 (1967-10-01), Lomerson
patent: 3545079 (1970-12-01), Kossar
patent: 3546776 (1970-12-01), Rodriguez et al.
patent: 3968193 (1976-07-01), Langston, Jr. et al.
patent: 4245273 (1981-01-01), Feinberg et al.
patent: 4322778 (1982-03-01), Barbour et al.
patent: 4328530 (1982-05-01), Bajorek et al.
patent: 4345955 (1982-08-01), Bakermans et al.
patent: 4349862 (1982-09-01), Bajorek et al.
patent: 4549200 (1985-10-01), Ecker et al.
patent: 4608592 (1986-08-01), Miyamoto
Benenati et al., IBM Tech. Disc. Bull., 10(12), May 1968, "Circuit Package", pp. 1977-1978.
Arnold et al., IBM Tech. Disc. Bull., 9(6), Nov. 1966, "Fabrication of Multilayer Ceramic Structure . . .", pp. 565-566.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

High density integrated circuit package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High density integrated circuit package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High density integrated circuit package will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-605495

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.