Method, apparatus and system for multiply rounding using redunda

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3647462, G06F 700, G06F 738

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active

056445229

ABSTRACT:
A data processing apparatus for rounding an input number coded in a redundant bit form including a magnitude signal and a sign signal for each bit of the input number. A carry path control signal generator (372, 382) forms carry/borrow control signals for each bit of the input number from the corresponding magnitude signal and sign signal. A first borrow ripple unit (386) receives the carry/borrow control signals corresponding to a set of the least significant bits of the input number and a "0" borrow in signal for its least significant and generates a normal coded data signal and a borrow out signal for a most significant bit of this set of least significant bits. A second borrow ripple unit (376) receives the carry/borrow control signals corresponding to the most significant bits and a "1" borrow in signal for its least significant bit and generates a first rounded number having a normal coded data signal. The second rounded number generator includes a mask ripple unit (374) and a bit wise exclusive OR unit (378). A multiplexer (390) selectively outputs as a rounded output number either the first rounded number, the second rounded number or a third normal rounded number equal to one more than the first rounded number. This selection is based upon the normal coded data signal of said most significant bit of the set of least significant bits and the borrow out signal of this bit. In the preferred embodiment of this invention, the rounding unit is embodied in at least one digital image/graphics processor (71, 72, 73, 74) as a part of a multiprocessor (100) formed in a single integrated circuit used in image processing.

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