Parity for computer system having an array of external registers

Details Parity for computer system having an array of external registers Parity for computer system having an array of external registers

1979-01-26

1980-11-18

Malzahn, David H.

Excavating

364738, G06F 1110

Patent

active

042349559

ABSTRACT:
For a computer system having an array of external registers which may be used as a data source or data destination, wherein such system uses an odd parity checking system, and wherein certain of the register position in the external array can be vacant, an improved parity checking configuration includes a plurality of parity bit latches, one for each location in the external register array. The parity bit latches are set by an initial microprogram load to provide an odd parity bit for each location in the external array of registers which is empty or which may be faulty, disabled or malfunctioning. This assures that when the external array is searched by row, that all of the array locations will provide the appropriate parity check regardless of whether a byte of information exists therein or not.

REFERENCES:
patent: 3342983 (1967-09-01), Pitkowsky et al.
patent: 3585378 (1971-05-01), Bouricius
patent: 3599146 (1971-08-01), Wersbecker
patent: 3789204 (1974-01-01), Barlow
patent: 3986015 (1976-10-01), Gooding et al.
patent: 4103823 (1978-08-01), Aichelmann, Jr. et al.

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