Process of manufacturing a semiconductor device

Details Process of manufacturing a semiconductor device Process of manufacturing a semiconductor device

1995-09-28

1997-07-01

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 26, 437 27, 437149, 437154, H01L 21265

Patent

active

056438087

ABSTRACT:
A method of manufacturing wherein an NPN bipolar transistor, an N-type impurity region is formed in an N-type epitaxial region or an N-type well region between an N.sup.+ -buried layer region and a P-type intrinsic base region. The N-type impurity region is formed only just below the P-type intrinsic base region. The impurity concentration of the N-type impurity region is either uniform or is higher at a central portion of the region located just below an emitter diffused region than the impurity concentration at the surrounding the central portion.

REFERENCES:
patent: 4868135 (1989-09-01), Ogura et al.
patent: 4996581 (1991-02-01), Hamasaki
patent: 5010026 (1991-04-01), Gomi
patent: 5015594 (1991-05-01), Chu et al.
patent: 5183768 (1993-02-01), Kameyama et al.
patent: 5208171 (1993-05-01), Ohmi
patent: 5455189 (1995-10-01), Grubisich

Affiliated with

Also associated with

Rating

Process of manufacturing a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process of manufacturing a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process of manufacturing a semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-596352