Implantation of ions into an insulating layer to increase planar

Details Implantation of ions into an insulating layer to increase planar Implantation of ions into an insulating layer to increase planar

1986-11-06

1989-05-02

Macon, Robert S.

357 63, 357 48, 357 50, H01L 2934

Patent

active

048273244

ABSTRACT:
A method for forming a PN junction having an enhanced breakdown voltage includes the step of forming a silicon dioxide or other insulating layer over the PN junction of the diode. The silicon dioxide layer is then implanted with ions. Depending on the species implanted into the silicon dioxide layer, the silicon dioxide layer becomes resistive. The metallization contacting the anode of the diode and the cathode of the diode also contacts the doped silicon dioxide layer. Of importance, electrical fields caused by current flowing through the doped silicon dioxide layer alter the radius of curvature of the depletion region between the anode and cathode, thereby enhancing the diode breakdown voltage.

REFERENCES:
patent: 3328210 (1967-06-01), McCaldin et al.
Matsushita et al., "Highly Reliable High-Voltage Transistors by Use of The Sipos Process", IEEE Transactions on Electron Devices, vol. Ed-23, No. 8, Aug. 1976, pp. 826-830.
Baliga et al. "The Insulated Gate Transistor: A New Three-Terminal MOS-Controlled Biplar Power Device", IEEE Transactions on Electron Devices, vol. Ed-31, No. 6, Jun. 1984, pp. 821-828.
Gartner et al. "Electronic Conduction Mechanisms of Cs- and B-Implanted SiO.sub.2 -Films", Applied Physics 12, 1977, pp. 137-148.
Sandoe et al., "Characterization and Modelling of Sipos On Silicon High-Voltage Devices", IEE Proceedings, vol. 132, Pt. 1, No. 6, Dec. 1985, pp. 281-284.
Goetzberger, "Invited: Ion Implantation in Mos-Structures", 2419 Solid State Devices 5th Conference, 1973, pp. 289-294.

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