Method for erasing data in a semiconductor memory device

Details Method for erasing data in a semiconductor memory device Method for erasing data in a semiconductor memory device

1988-04-05

1989-11-28

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

365218, G11C 1134

Patent

active

048842397

ABSTRACT:
The invention concerns a method for electrically erasing data stored in a FAMOS-type EPROM. That is, in an Electrically Programmable Read Only Memory of the Metal Oxide Semiconductor type in which a Floating gate is employed as a memory element and in which data-writing is effected by charge injection from a channel Avalanche current, the invention concerns a method for effectively removing such channel-injected charge from a subject written floating gate. The method specifically entails the injection into the written gate of neutralizational opposing-polarity hot carriers from a generated reverse avalanche current between th MOS drain and substrate. The drain avalanche, however, is limited to "non-breakdown" levels by a technique which, in addition to appropriate drain biasing, includes suitable source and control-gate biasing so as to essentially prevent the flow of channel current during erasure. The method is applicable to either n-channel or p-channel devices and does not require the use of a separate select transistor.

REFERENCES:
patent: 4375087 (1983-02-01), Wanlass
patent: 4462089 (1984-07-01), Miida

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