Pin-assignment method for integrated circuit packages to increas

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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438106, H01L 2348

Patent

active

061076813

ABSTRACT:
A pin-assignment method is provided for use on an IC package to arrange pin connections. The pin-assignment method can allow an improvement in the electro-static discharge (ESD) protection capability for the IC chip packed in the IC package. Specifically, the pin-assignment method organizes the no-connect pins of the IC package into groups and then assigns each of the two pins that bound each no-connect pin group to be connected to a power bus of the IC chip. This allows for an increased ESD protective capability for the no-connect pins. Moreover, the pin-assignment method can simplify the wiring complexity of the IC package.

REFERENCES:
patent: 4990996 (1991-02-01), Kumar et al.
patent: 5512783 (1996-04-01), Wakefield et al.
patent: 5869870 (1999-02-01), Lin

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