Method for manufacturing Bi-CMOS transistor devices

Details Method for manufacturing Bi-CMOS transistor devices Method for manufacturing Bi-CMOS transistor devices

1993-04-26

1994-10-04

Thomas, Tom

Fishing, trapping, and vermin destroying

437 26, 437 31, 437 32, 437 33, 437 57, H01L 21265

Patent

active

053526171

ABSTRACT:
A method of manufacturing a semiconductor device having a bipolar transistor and a MOS transistor is disclosed, which comprises covering the bipolar transistor formation region with a gate insulating film and also with a first gate formation material at the time of the MOS transistor gate formation, removing the first gate formation material and gate insulating film covering at least a portion of the bipolar transistor formation region, thus forming an opening in the gate insulating film and first gate formation material, forming a second gate formation material, removing other portion of the first and second gate formation materials than on the bipolar transistor formation region and the MOS transistor gate formation region, forming an inter-layer insulating film, and removing the inter-layer insulating film and first and second gate formation materials on at least a portion of the bipolar transistor formation region, thus forming a second opening in the first-mentioned opening in the inter-layer insulating film and first and second gate formation materials.

REFERENCES:
patent: 4703554 (1987-11-01), Havemann
patent: 4729965 (1988-03-01), Tamaki et al.
patent: 5028557 (1991-07-01), Tsai et al.
patent: 5089430 (1992-02-01), Owada et al.
patent: 5124270 (1992-06-01), Morizuka
patent: 5132234 (1992-07-01), Kim et al.
patent: 5147818 (1992-09-01), Hikida
patent: 5232861 (1993-08-01), Miwa

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