Method for fabricating a shallow trench isolation structure

Details Method for fabricating a shallow trench isolation structure Method for fabricating a shallow trench isolation structure

1999-03-02

2000-08-22

Bowers, Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438221, H01L 2176

Patent

active

061071595

ABSTRACT:
A method for forming a STI structure is provided. The method contains sequenitially forming a pad oxide layer and a mask layer on a semiconductor substrate. Several trenches in the substrate through the mask layer and the pad oxide layer. The trenches has a wider trench and a narrower trench. A liner oxide layer is formed at each sidewall of the trenches in the substrate. A spacer is formed on each sidewall of the wider trench, in which the narrower trench simultaneously is filled with same insulating material. A conformal polysilicon layer is formed over the substrate, in which the wider trench is not completely filled yet. An insulating plug is formed to fill the wider trench. Using the insulating plug as an etching mask a portion of the polysilicon layer is removed by etching. As a result, a polysilicon pivot sidewall of the remaining polysilicon layer due to etching may occur. The polysilicon pivot sidewall is compensated with polysilicon. The mask layer and the pad oxide layer are removed, and a gate oxide layer is formed instead. During the formation of the gate oxide layer, a surface portion of the polysilicon layer is also oxidized so that the insulating plug and the spacer are merged through the oxidized portion of the polysilicon to form a round isolation structure.

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