Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-02-27
2000-08-22
Niebling, John F.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, H01L 2120, H01L 2176
Patent
active
061071579
ABSTRACT:
A microelectronic device includes a field oxide isolation pad which extends from a trench formed in a microelectronic substrate by a height which is less than approximately two times the height of a gate structure formed on the microelectronic substrate. Spacers are formed around the gate structures, although little or no spacer forms around the isolation pad. The microelectronic device is fabricated by forming a gate oxide layer on a microelectronic substrate, depositing a first gate layer on the gate oxide layer, forming a trench extending through the gate layer, the gate oxide layer and into the substrate, filling the trench with a field oxide, planarizing the field oxide, recessing the field oxide to a level above the microelectronic substrate and below an upper level of the first gate layer, forming a second gate layer over the recessed field oxide and the first gate layer, forming a conductive layer over the second gate layer, forming gate structures in the conductive layer, the first and second gate layers, and the gate oxide layer, and forming spacers adjacent the gate structures.
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Fazan Pierre C.
Sandhu Gurtej S.
Lindsay Jr. Walter L.
Micro)n Technology, Inc.
Niebling John F.
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