Process for manufacturing a ceramic wiring substrate having a lo

Details Process for manufacturing a ceramic wiring substrate having a lo Process for manufacturing a ceramic wiring substrate having a lo

1992-03-10

1994-02-01

Breneman, R. Bruce

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427 97, 427 99, B05D 512

Patent

active

052830810

ABSTRACT:
A process for manufacturing a hybrid multilayer ceramic wiring substrate having a low dielectric constant includes a conductor wiring forming step and an insulating layer forming step. The conductor wiring forming step comprises the steps of: applying a photoresist upon a multilayer ceramic wiring substrate in which a plurality of conductor layers are laminated via insulation layers formed of a low temperature sinterable ceramic composition having a low dielectric constant; exposing the photoresist to light and developing the exposed photoresist to form a mask pattern; and selectively plating the mask pattern. The insulating layer forming step comprises the steps of: printing a photo-setting paste for an insulating layer on the substrate and drying the paste; forming a via hole pattern by light exposure and development using a mask; and burying and sintering a conductor paste into via holes. A micro multilayer wiring is formed by a combination of the conductor wiring forming step and the insulating layer forming step, whereby high density micro wiring and high speed transmission are attained.

REFERENCES:
patent: 4226932 (1980-10-01), Ferraris
patent: 4562092 (1985-12-01), Wiech, Jr.
patent: 4578279 (1986-03-01), Zingher
patent: 4684543 (1987-08-01), Baudry
patent: 5055164 (1991-10-01), Hawkins et al.
patent: 5162240 (1992-11-01), Saitou et al.

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