Fishing – trapping – and vermin destroying
Patent
1992-10-19
1994-03-01
Thomas, Tom
Fishing, trapping, and vermin destroying
437 47, 437 60, H01L 2170
Patent
active
052907287
ABSTRACT:
A method for fabricating a semiconductor device including a contact window formed in an interlevel insulator so as to connect electrodes to an interconnection and to connect impurity diffusion regions to the interconnection is provided. After forming an insulating film whose thickness on a contact region of at least one of the plurality of electrodes, which is to be electrically connected to the interconnection, is smaller than that on at least another one of the plurality of electrodes, which is not to be electrically connected to the interconnection. The interlevel insulator formed on part of the plurality of impurity diffusion regions is etched until a surface of the semiconductor substrate is exposed, and the interlevel insulator on the contact region of at least one of the plurality of electrodes is etched until a surface of the electrode is exposed.
REFERENCES:
patent: 4208780 (1980-06-01), Richman
patent: 4868138 (1989-09-01), Chan et al.
patent: 4965226 (1990-10-01), Gootzen et al.
patent: 5006484 (1991-04-01), Harada
patent: 5187114 (1993-02-01), Chan et al.
A. Shinohara et al., Extended Abstracts of the 17th Conference on Solid State Devices and Materials, Tokyo, 1985, pp. 29-32, "A New Self-Aligned Contact Technology for LDD MOS Transistors."
Sharp Kabushiki Kaisha
Thomas Tom
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