Multi-layer tolerance checker

Details Multi-layer tolerance checker Multi-layer tolerance checker

1990-02-13

1991-01-15

Karlsen, Ernest F.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324538, G01R 3102

Patent

active

049856758

ABSTRACT:
Multi-layer printed circuit boards are sometimes connected to transmission paths which may be susceptible to electrical discharges associated with transient electrical events occurring along the transmission path. A method is provided for assuring that two respective layers of the printed circuit board are aligned within predetermined tolerances. Aligning respective layers within acceptable tolerances provides a means of assuring that predetermined distances between a ground layer and a power layer will be maintained, thereby ensuring that electrical arcing will not occur between the power and ground layer in the event of voltage spikes or current surges.

REFERENCES:
patent: 3243498 (1966-03-01), Allen et al.
patent: 3859711 (1975-01-01), McKiddy
patent: 4432037 (1984-02-01), Brabetz
patent: 4510446 (1985-04-01), Braun et al.
patent: 4894606 (1990-01-01), Paur

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