Phase locked loop clock synchronizing circuit with programmable

Details Phase locked loop clock synchronizing circuit with programmable Phase locked loop clock synchronizing circuit with programmable

1979-11-14

1981-12-08

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 2, 331 17, 331 25, 331 27, 331 34, H03L 708

Patent

active

043050450

ABSTRACT:
A clock synchronization unit for controlling frequency and phase of a local clock and synchronism with an external clock signal, employs a programmable controller as a part of a phase-locked loop. The controller provides highly accurate control of the clock, including verification of the accuracy of the clock control signal before applying it to the clock oscillator as well as control of the magnitude to the clock oscillator to avoid rapid changes in frequency. In one particular embodiment, the programmable controller comprises duplicated microprocessors which perform operations in step. In a master/slave oscillator arrangement, the controller controls the slave clock oscillator as well as the master to assure tracking of the slave to the master.

REFERENCES:
patent: 3769607 (1973-10-01), Thelen
patent: 3795872 (1974-03-01), Napolitano et al.
patent: 4156200 (1979-05-01), Gomez
Saltzberg et al., "Network Synchronization", The Bell System Technical Journal, May-Jun. 1975, pp. 879-892.

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