Switched capacitor gain stage

Details Switched capacitor gain stage Switched capacitor gain stage

1995-06-12

1996-11-12

Gaffin, Jeffrey A.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341156, 341155, H03M 112

Patent

active

055744575

ABSTRACT:
A switched capacitor gain stage (21) that samples an input voltage every clock cycle phase for effectively doubling the frequency of operation. The switched capacitor gain stage (21) comprising an amplifier (22), a first capacitor network, and a second capacitor network. Either the first or second capacitor network is sampling an input voltage. For example, the first capacitor network samples an input voltage. Capacitors of the first capacitor network are coupled to sample the input voltage via switches. Capacitors of the second switched capacitor network are coupled around the amplifier (22) in a gain configuration via switches. The capacitors of the second switched capacitor network having a voltage stored from a previous clock phase. In a next clock phase the second switched capacitor network are coupled via switches for sampling an input voltage and the first switched capacitor network is coupled via switches in a gain configuration around the amplifier (22).

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