Self-aligned MESFETs having reduced series resistance

Details Self-aligned MESFETs having reduced series resistance Self-aligned MESFETs having reduced series resistance

1980-07-23

1981-12-08

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 148 15, 148187, 357 15, 357 22, H01L 2126

Patent

active

043040420

ABSTRACT:
Disclosed herein is a structure and process for a self-aligned metal semiconductor field effect transistor having the characteristics of a high speed, high density, low power LSI circuit and specifically an improved high device gain MESFET device using conventional photographic techniques. The inventive MESFET device has improved high device gain as a result of the elimination of series resistance, increased circuit integration density, and improved speed capability due to the elimination of spacings between gate and drain and gate and source and the improved high device gain.

REFERENCES:
patent: 3899372 (1975-08-01), Esch et al.
patent: 4023195 (1977-05-01), Richman
patent: 4111725 (1978-09-01), Cho et al.
patent: 4160987 (1979-07-01), Dennard et al.
patent: 4183040 (1980-01-01), Rideout
patent: 4204894 (1980-05-01), Komeda et al.
patent: 4215356 (1980-07-01), Kato
patent: 4235011 (1980-11-01), Butler et al.
patent: 4253229 (1981-03-01), Yeh et al.
IBM Technical Disclosure Bulletin, vol. 9, No. 10, Mar. 1967, pp. 1470 and 1471.

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