Fishing – trapping – and vermin destroying
Patent
1995-09-25
1996-11-12
Tsai, H. Jey
Fishing, trapping, and vermin destroying
437 52, H01L 21265
Patent
active
055739660
ABSTRACT:
A process for fabricating the memory cells of a read-only memory (ROM) device is disclosed. First, source and drain regions which constitute the bit-lines are formed on a silicon substrate by an ion implanting process. Thereby, channel regions are formed between the abutting bit-lines. Next, portions of the channel regions designated for coding are etched to form trenches. An insulating layer is then formed to fill the trenches. After that, a gate oxide layer is formed on the channel regions. Gate electrodes extending along a direction orthogonal to that of the bit-lines are formed on the substrate to constitute the word-lines. Therefore, the intersecting region of one word-line with two abutting bit-lines constitutes a memory cell of the ROM device. When applying a normal operating voltage, memory cells without the trenches are in an ON state and memory cells with the trenches are in an OFF state since the channel regions are blocked by the insulating layer within the trenches.
REFERENCES:
patent: 4271421 (1981-06-01), McElroy
patent: 5504030 (1996-04-01), Chung et al.
patent: 5510287 (1996-04-01), Chen et al.
Tsai H. Jey
United Microelectronics Corporation
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