Phase synchronizing circuit for use in multi-level, multi-phase,

Details Phase synchronizing circuit for use in multi-level, multi-phase, Phase synchronizing circuit for use in multi-level, multi-phase,

1980-08-07

1982-06-08

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

375 42, 375 81, 329104, 329112, 329122, H03D 1300

Patent

active

043343120

ABSTRACT:
A multi-level, multi-phase, superposition-modulated signal is phase detected in a four-phase phase detector with the output from a voltage controlled oscillator (VC0). The P and Q outputs from the phase detector are supplied to a plurality of phase shifters and level discriminators to generate a plurality of digital signals corresponding to various phase positions of the received signal, and the P and Q signals are also supplied to demodulator and logic circuitry. Mutually orthogonal pairs of outputs from the level discriminators are frequency multiplied in Exclusive OR (EOR) gates, the outputs of which are selectively passed through a gate circuit in accordance with the phase position of the received signal determined by the output of the logic circuitry. A pair of mutually orthogonal demodulator outputs are also frequency multiplied by combination in a second EOR gate, and the output of the gate circuit is then frequency doubled by EOR combination with the output of the second EOR gate. This frequency-quadrupled signal is then supplied as the control voltage to the VCO.

REFERENCES:
patent: 3737578 (1973-06-01), Matsuo
patent: 3924197 (1975-12-01), Okano
patent: 3970946 (1976-07-01), Matsuo
patent: 3983499 (1976-09-01), Tan
patent: 4039961 (1977-08-01), Ishio
patent: 4095187 (1978-06-01), Yoshida
patent: 4099130 (1978-07-01), Yoshida
patent: 4143322 (1979-03-01), Shimamura

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