Priority determining network having user arbitration circuits co

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G06F 946

Patent

active

043342884

ABSTRACT:
A priority determining network to concurrently arbitrate between a plurality of requests that are initiated by different users who each desire either access to a system (e.g. a computer, a communication system, or the like) or interruption of transfer of data between certain components (e.g. a memory) that are shared by various facilities of the system. Each user is assigned a respective priority number, the magnitude of which determines the order in which the users gain control of the system. Coded signals which correspond to bits of each user's priority number are stored in respective user register means. Each user has an arbitration circuit that comprises a plurality of serially interconnected arbitration stages, which stages are connected between the user's register means and respective ones of a multi-line bus. The bus lines are common to the arbitration circuits of all competing users. Each arbitration stage is connected to receive one bit of a respective user's priority number. The arbitration circuit of the user having the highest assigned priority number includes gating means which are adapted to drive the multi-line bus to corresponding control signal levels. The arbitration circuits of all unsuccessful competing users include respective gating means that are driven to different signal levels by means of the control signals that are supplied thereto via the common bus lines. Only the arbitration circuit of the user having the highest priority number will be able to generate an output signal that is suitable to enable control of the system to be obtained.

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